RISC-V and the new semiconductor independence strategy
RISC-V and open-source hardware form a semiconductor independence strategy in which companies build chip and system capabilities on a shared, license-free instruction set and transparent design platforms instead of depending on closed, proprietary architectures defined by external vendors. This shift is changing how deep-tech players think about control, security and long-term innovation. For processor IP specialists such as Cortus, the attraction of the RISC-V semiconductor architecture lies in a standardised ISA that guarantees software portability while keeping room for design freedom. By avoiding single-vendor roadmaps and opaque licensing models, RISC-V lets engineers tailor cores to specialised tasks in embedded systems, industrial IoT and AI accelerators. In parallel, open boards and instruments give researchers and students direct access to hardware internals, building a generation of designers who understand, and can modify, the full compute stack from board to ISA.
Cortus and RISC-V: open standards for next-generation compute
Cortus shows how a focused RISC-V semiconductor architecture strategy can support both commercial scale and open innovation deep tech. The company started with its own 32-bit embedded architecture, which Michael Chapman says has been used in more than 18 billion devices, with current production at around 1.2 billion units per year. That experience feeds directly into its advanced RISC-V platforms for automotive, avionics, space and nuclear systems. RISC-V’s open standard ISA lets Cortus combine compatibility with custom extensions tuned for energy-efficient AI computing, deterministic control or safety-critical workloads. Unlike closed CPU ecosystems, there is no dependence on a single vendor’s feature roadmap. Instead, chip makers, tool vendors and software teams can cooperate around a shared base while still competing on microarchitecture, accelerators and system integration. This mix of openness and differentiation is becoming central to any realistic semiconductor independence strategy.
Red Pitaya and European open-source hardware in the lab
On the hardware platform side, Red Pitaya illustrates how European open-source hardware can turn theory into hands-on deep tech. The company’s STEMlab 125-14 PRO Gen 2 is an open instrumentation platform used across photonics, embedded systems, quantum technologies and engineering education. Originating from a crowdfunding launch, it has grown into a widely adopted test-and-measurement tool that replaces closed, proprietary boxes with a programmable signal-processing environment. CEO Mateja Lampe Rupnik describes the founding goal as democratising access to advanced engineering technologies by breaking dependence on tightly controlled ecosystems and expensive, inflexible instruments. Because schematics, software and reference projects are open, teachers and engineers can inspect, modify and repurpose the hardware for radar experiments, custom RF front ends or control systems. That transparency accelerates learning and shortens the path from lab prototype to deployable product in sectors that have traditionally been slowed by closed tools.
Open innovation deep tech vs closed semiconductor models
Taken together, RISC-V processor IP from Cortus and platforms from Red Pitaya illustrate an open innovation deep tech model that contrasts with traditional closed semiconductor ecosystems. In the closed approach, instruction sets, toolchains and instrumentation are controlled by a few companies, and product evolution depends on opaque roadmaps and licensing terms. In the open model, the RISC-V ISA is standardised, while implementations, extensions and boards remain competitive spaces. This creates room to build specialised accelerators for AI and control systems without losing software portability. Meanwhile, open hardware instruments expose the analogue and digital front ends needed for quantum and sensing research. The result is a layered stack in which researchers can instrument experiments, design custom SoCs and iterate quickly, instead of waiting for proprietary tools to catch up with new workloads in AI inference, embedded analytics or quantum control.
Building engineering talent for autonomous chip design
A lasting semiconductor independence strategy depends on talent as much as on IP portfolios, and open-source projects are now central to that pipeline. When students design a radar on Red Pitaya boards or modify firmware on RISC-V cores from companies like Cortus, they gain exposure to the same architectures that drive commercial embedded systems and AI edge devices. Because the hardware and software are open, they can step through HDL, system-level models and toolchains instead of treating chips as black boxes. That experience builds confidence in next-generation chip design, verification and embedded systems engineering. It also supports a more distributed innovation model: universities, startups and established chip vendors can share building blocks, test cases and reference designs. Over time, this ecosystem of shared knowledge strengthens local capability to design, validate and deploy specialised processors and systems without depending on closed foreign architectures.
