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GlobalPlatform’s Pavona Puts Post‑Quantum Security Inside Open-Source IoT Chips

GlobalPlatform’s Pavona Puts Post‑Quantum Security Inside Open-Source IoT Chips
interest|Open-Source Hardware

What Pavona Is and Why It Matters for IoT Device Security

Pavona is an open-source silicon distribution that combines certification-ready security IP, silicon-proven roots of trust and a complete post-quantum cryptography stack, enabling designers to build secure-by-default chips for IoT and other connected systems without relying on proprietary, single-vendor solutions. For IoT products that may operate for a decade or more, security choices made at silicon design time decide how keys are stored, how firmware is authenticated and how future threats are contained. Pavona addresses this by supplying an open, composable framework that embeds secure roots of trust from the start rather than as add-on secure elements. Hosted by GlobalPlatform and guided by an independent Technical Steering Committee, the Pavona platform aims to make high-assurance IoT device security accessible to design teams that would otherwise struggle to assemble and validate a full cryptographic and certification-ready hardware stack on their own.

GlobalPlatform’s Pavona Puts Post‑Quantum Security Inside Open-Source IoT Chips

From Monolithic Chips to Composable Open-Source Silicon

Traditional open silicon projects often ship a single core or a largely fixed reference chip, which limits how well security logic can be adapted to varied IoT architectures. Pavona takes a different path: it acts as a distribution, with a curated IP library and a composition engine that let integrators assemble tailored security subsystems for microcontrollers, standalone secure elements or chiplet-based systems. According to IoT Business News, Pavona already includes two taped-out reference roots of trust at TSMC 3nm: one as a standalone chip and one integrated into a chiplet architecture. These silicon-proven designs give IoT engineers a concrete baseline instead of abstract RTL or simulation-only projects. Because the architecture is aligned with FIPS 140-3 and Common Criteria expectations, it also helps teams plan certification from the earliest design-in discussions rather than bolting it on near production.

Post-Quantum Cryptography Built into the Pavona Platform

Quantum computing threatens many of the public-key schemes currently used for firmware signing, secure boot and encrypted communication in IoT devices. Pavona addresses this by shipping what GlobalPlatform calls the first openly available production-grade post-quantum cryptography stack for embedded silicon. The distribution incorporates hardware-software co-design work by ZeroRISC, the Max Planck Institute for Security and Privacy, and Academia Sinica, which demonstrated 6–9x performance gains for ML-KEM and ML-DSA algorithms with 36–75% improvements in maximum operating frequency at near-zero area cost. For IoT designers, this means post-quantum algorithms are not an afterthought, but part of a unified cryptographic stack that also covers classical schemes. The Pavona platform therefore allows future-ready key exchange and signatures to sit alongside existing protocols, making post-quantum adoption a design-time decision rather than a disruptive field upgrade for already-deployed devices.

Removing Vendor Lock-In from IoT Security Roots of Trust

Many IoT products depend on closed, vendor-specific secure elements or proprietary security blocks, which can complicate supply chains and limit transparency into how secrets are protected. Pavona’s open-source silicon approach aims to reduce these barriers by providing community-governed, standards-aligned roots of trust that integrators can inspect, customize and integrate into their own dies. Dominic Rizzo describes Pavona as “the home for composable open-source secure silicon,” stressing that trustworthy chip security should be accessible and independently governed, not locked into single-vendor offerings. For IoT manufacturers, this means they can base designs on a common security baseline while still differentiating on performance, peripherals or power budgets. It also allows them to avoid being tied to one supplier for critical security IP, supporting long product lifetimes where second sources and transparent, auditable designs are key to meeting regulatory and customer security expectations.

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