What Electrical-Optical-Electrical Simulation Changes for Designers
Electrical-Optical-Electrical simulation is a design method that models complete signal paths as they move from electrical circuits into optical components and back into electronics within a single, continuous workflow. Keysight’s new EOE capability in ADS 2026 brings this idea into practice by joining traditional high-speed electrical analysis with detailed photonic and optical modeling. Instead of switching between separate SerDes design tools and photonics IC design environments, engineers can now build one signal path model that covers transmitters, optical fiber or waveguides, and electrical receivers together. This unified electrical optical simulation matters because optical links are becoming standard between CPUs, GPUs, and high-speed SerDes interfaces used in AI infrastructure and high-performance computing. As signaling speeds rise toward terabit-class links, being able to see electrical and optical behavior side by side helps teams understand signal integrity and architecture tradeoffs sooner.
Unified Signal Path Modeling for SerDes and Photonics ICs
In ADS 2026, the EOE workflow connects Keysight’s High Speed Digital tools with Keysight Photonic Designer, so one project can cover both electrical channels and optical envelopes. Engineers can simulate electrical-to-optical-to-electrical chains, including drivers, modulators, photonic circuits, and SerDes receivers, without exporting data between unrelated tools. For SerDes design tools users, this brings optical behavior into familiar eye diagrams, jitter analysis, and channel modeling. For photonics IC design teams, it adds realistic electrical drivers and receivers around their optical cores. The result is signal path modeling that reflects how real systems behave when domains interact. According to Engineering.com, “by 2029, 87% of hyperscale optical transceivers are expected to operate at 800Gbps or higher,” which means multi-wavelength, multi-lane links will rely heavily on accurate co-simulation rather than separate, loosely connected analyses.
Catching Cross-Domain Signal Integrity Issues Earlier
EOE simulation in ADS 2026 is designed to reveal signal integrity problems that only appear when electrical and optical domains are modeled together. Engineers can run end-to-end studies that include electrical noise sources, optical nonlinearities, and receiver impairments in the same scenario. This makes it possible to see how modulator bias-dependent effects or large-signal nonlinear behavior degrade eye openings or increase error rates before hardware testing. The workflow also supports bidirectional optical links, so forward and backward propagation can be examined in a single EOE channel model. Noise modeling spans electrical and optical segments simultaneously, giving a system-level picture of signal quality instead of isolated plots. By exposing these cross-domain issues earlier in the design cycle, teams can cut down on design iterations, adjust architectures in simulation, and avoid late-stage surprises when prototypes combine silicon electronics with photonic ICs.
Supporting Multi-Wavelength Links and Heterogeneous Chips
Modern hyperscale and AI systems depend on multi-wavelength communication links, including 800G and emerging 1.6T designs based on wavelength division multiplexing. ADS 2026’s electrical optical simulation can examine nonlinear effects across multiple wavelengths, so designers can see how channel impairments interact in multi-lane interconnects rather than treating each wavelength in isolation. Full-duplex optical support also matters for advanced architectures where control channels, monitoring signals, or reflection paths share the same physical medium. Beyond system-level analysis, the EOE environment ties into PDK-based circuit design and Keysight RSoft integration at the component level, helping teams refine photonics IC design while considering packaging and electrical interfaces. As heterogeneous chip designs that blend silicon electronics with integrated optics grow more complex, this single workflow offers a way to align device optimization, link budgeting, and SerDes implementation around one consistent model of the entire signal path.